TODO:

Move to a different development kit.
The new kit should have at least SDRAM, a higher bit display, and the possibility of higher host command bandwidth.

Add performance counters to Engine. I need to know just how many pixels/sec and polygons/sec the device is pushing. A standard benchmark needs to exist and be run on each release.

Implement a third driver backend to engine that replicates in software exactly what the hardware is (supposed to be) doing.
This will give in software an ideal implementation, a pixel perfect simulation, and a hardware driver.

Implement a rectangular block fill. This is different from the block_set MU in that the block_set MU only sets consecutive frame buffer addressees to a particular value (so it can clear the entire frame buffer or depth buffer), whereas a rectangular block fill will allow setting a rectangle of pixels within the frame buffer to a particular value. This may be accomplished by extending the block_set MU so that its current behavior is just a special case.

Implement drawing single pixel lines in a hardware unit.

Implement a hardware cursor.

Implement double buffering.

Add a command sequencer that will allow the execution of commands from the frame buffer.

Implement a 'programmable' shader.

Make a first cut at integrating into Mesa.

Mesa can be compiled as a stand alone library with a mgl (instead of gl) prefix for the API as not to conflict with an existing openGL implementation.

Done:

Test pattern only display
Frame buffer drawn on VGA display with drawing pixels over parallel port
Add block set functional unit to accelerate clearing display and buffers
Depth buffered scan line implementation for flat shading
Implement simple texture mapping i.e. nearest pixel selected, no mip-map
Remove all dependence of the high level TVC design on a parallel port. This involved implementing a separate control bus that is driven by the EPP Control Unit (EPPCU).

Not Going To Do:

Fix the bugs in the mcu-hl.

These bugs are likely the cause of the missing/incorrect pixels in the teapot test.

Reason: After playing with the design of a sdram controller, I realized that the current design of TVC is quite tied to the current memory controller, and the addition of the DQM (data mask lines) in sdram makes a tremendous amount of complexity in the MCU-HL obsolete and irrelevant. The entire memory controller needs to be ripped out and replaced (which will mean I need a different development kit). This change will ripple changes into the MU bus design.